Exercise 1: Engineering Process

The text Formal Specification and Verification within Systems Engineering (FS+VwSE)(see: http://www.uffmm.org/fsv) describes a certain view of the engineering process. Try to answer the following questions by writing a short text:

  1. What is the difference between the actors labeld with a 'zero' -e.g. $ U^{0}, S^{0}, E^{0}$- and those with a '1' -e.g. $ U^{1}, S^{1}, E^{1}$?
  2. What is the difference between a task and the actions realizing a task?
  3. If one describes the intended behavior of systems like $ U^{0}, S^{0}, E^{0}$ what is the difference between the description with an UML-Use Case diagram and an UML-Sequence diagram?
  4. How can You formalize the intended behavior of an intended system $ S^{0}$ used by intended users $ U^{0}$ within an intended environment $ E^{0}$ by using the concepts state and action?
  5. Take one of the additional publications (i) chap.1.4 and chap.3 of [76] or (ii) chap.4 of [142] and compare these descriptions of an engineering process with the description at http://www.uffmm.org/fsv. What are the differences?
  6. Try to describe in one sentence, what you understand by the term verification within the described engineering processes?
  7. What is the difference between verification and validation?

Gerd Doeben-Henisch 2010-03-03